SYSdev Program Structure

SYSdev Program Structure

The SYSdev programming language is a combination of ladder, high-level (subset of "C") and assembly (MCS-96). All the files which comprise a SYSdev program are programmed in the same language format. Each file can be written in any combination of the language types.

Each file is executed sequentially from beginning to end. The main program file is executed (scanned) continuously unless interrupted by the timed interrupt or either of the input interrupts. Main program execution is suspended while the interrupt executed. Program execution resumes at the point where the interrupt occurred at the completion of the interrupt.

Each file is implemented as a series of consecutive blocks. Each block is defined as one of the three programming languages: ladder, high-level, or assembly. Blocks of the different languages can be intermixed as necessary within the file.

The typical M4500 PLC SYSdev program consists of the following files:

  1. Initialization file (.LIN): executed once at power up (optional).
  2. Main Program file (.LMN): continuously looping (required).
  3. Timed Interrupt file (.LTD): executed once every 0.250 to 65.000 milliseconds as set by the user (optional).
  4. User Function file (.Lxy): up to 100 (00-99) user defined subroutines which can be called from the Initialization, Main, Timed Interrupt or any other User Function file.
  5. Input Interrupts (ufunc00 and ufunc01): With the input interrupts enabled, user function 00 is called when IN0 is activated or user function 01 is called when IN1 is activated.
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The PLC Section

The PLC section of the M4500 is a high performance programmable logic controller which incorporates a built-in processor, user program memory, user data memory, RS-232 programming port, interface to the display/keypad, interface to the I/O slots motherboard, and comprehensive diagnostics and internal fault detection.

The scan time of the PLC section is on the order of 0.25 milliseconds per K with scan times as low as 80 microseconds for short programs. Two additional interrupt inputs allow throughputs even less than 80 microseconds. Program memory consists of 32K bytes of battery-backed CMOS RAM. Data memory consists of 8K bytes RAM memory.

The PLC section supports addressing of up to 12 I/O slots. Note that geographical addressing is not used. The slot addresses are specified by dip switches on the I/O board. Addressing for up to 64 bytes is supported at each I/O slot. Memory mapped I/O is incorporated to provide the greatest degree of flexibility in accessing I/O boards. Two 10-30VDC interrupt inputs, two analog inputs, and two analog outputs are incorporated directly into the PLC processor as well.

The program structure of the PLC section is implemented using SYSdev, a windows or DOS based software package that allows the user to create, document, and compile the user logic program as well as directly interface to the M4500 for program download and on-line monitoring. Complete program print-outs including the user program listing, cross reference, and memory map can also be generated.

The PLS Section

The PLS section is a high speed programmable limit or cam switch which accepts angular position information in the form of resolver format signals and converts these to digital. The M4500 is configured for 8, 16, 32, or 64 timing channels. These are mapped to internal memory locations of the M4500 for use by the PLC section or can be written to output boards for use in general PLS applications.

The timing channels can be programmed "on" and "off" at user defined position set-points. Each timing channel can be programmed with up to 50 unique "on-off" set-points or with a pulse train of fixed "on" and "off" divisions throughout the entire channel.

The scale factor of the PLS is programmable from 2 to 4096 divisions per revolution while the offset is programmable from 0 to one minus the scale factor. The PLS supports up to 8 PLS programs when 8 timing channels are used and the scale factor is less than 512 (less PLS programs when more channels are used or the scale factor is greater than 512).

Speed Compensation is available for timing channels 0 through 7. This is used to compensate for the mechanical response time of a device activated by a particular timing channel. The speed compensation algorithm "leads" the desired activation position by a time in milliseconds entered for that channel. Thus, as the speed increases, the point at which the device is activated is advanced to compensate for the response time of the device. Note that the setup is simplified by entering the compensation parameter in units of time (milliseconds) which directly reflects mechanical response, not in degrees per RPM as done by other PLS manufacturers.

Since the PLS is fully integrated with the PLC, the advanced PLS features allow much more sophisticated machine related timing algorithms to be performed.

Interrupt Inputs

All M4500 modules are equipped with two 10-30 VDC differential interrupt inputs. The interrupts are activated at the "off" to "on" transition of the input. When this occurs, main program execution is suspended and a corresponding user function is called (ufunc00 for IN0, ufunc01 for IN1). At the completion of the user function, program execution resumes at the point in the main program where the interrupt occurred.

These inputs can also be used as standard inputs if desired. In this case, the input would not cause an interrupt but would instead simply be read and mapped to an internal flag for use by the program just like any digital input. Both inputs can be individually enabled or disabled as interrupts as part of the configuration of the module. The interrupt inputs are true differential inputs which can be wired as either sinking (true low) or sourcing (true high) depending on the device used to drive to input. Individual LED status indication is provided for each input.

Typical applications of the interrupt inputs include general high speed counting (up to 15KHZ) and interfacing to incremental encoders (even quadrature encoders when used in conjunction with the M245).

Analog I/O

Two analog inputs and two analog outputs are incorporated directly in the M4500.

The analog inputs are 0-5 volt which can be used as 0-20 mA or 0-10 volts as well when external resistors are installed to perform the respective conversion (250 ohm for 0-20 mA, two 10K ohm resistors as a voltage divider for 0-10 volts). The resolution of the analog inputs is 10-bits (0-1023). The inputs also incorporate a high speed conversion time of less than 25 microseconds and are updated once every other main scan.

The analog outputs are 0-10 volt which can be also be used to drive 0-5 volt inputs using a resistor divider network. The resolution of the analog outputs is 8-bits (0-255) and are updated every main scan.

Diagnostic/Fault Detection

The M4500 contains comprehensive fault detection routines which verify the proper operation of the module at all times. In addition, a fault interlock output (24VDC, 500 mA sinking) is incorporated which can be interlocked to the control system for system shut down or annunciation when a fault is detected. Some of the faults detected include:

  • Loss of scan (watchdog timer time-out)
  • Invalid User program (no program loaded)
  • Program memory checksum error
  • User program initiated fault (sfunc09(); call)
  • Program execution out of bounds
  • Invalid interrupt

When a fault is detected, program execution is suspended, the "RUN" LED on the M4500 is extinguished, the "FLT" LED is illuminated and the fault interlock output is turned "off". Using SYSdev, the fault can be displayed in the SYSdev fault menu. This menu shows the fault code, a description of the fault, and a suggested corrective action to quickly pin-point the fault and correct it.

In addition to the fault detection, a hardware confidence test is resident in the module to provide a complete test of the internal module hardware. This test is initiated through SYSdev and can be used to verify the M4500 for proper operation.

PLS Channel Programming

The PLS section of the M4500 is programmed through SYSdev using a laptop or thru the D4591 Display/Keypad. When using SYSdev, the PLS section can either be configured and the timing channels programmed off-line and down-loaded to the M4500 or the PLS timing channels can be programmed on-line, while the M4500 is in operation. The laptop is interfaced to the PLS section via the "PROG" port of the M4500 using an RS-232 cable from the COM port on the computer.

The following PLS programming commands are available:

  • PLS Configuration including:
    • Scale Factor (2-4096)
    • Position Offset
    • Selected PLS Program (0-7)
    • Number of Timing Channels (8, 16, 32, or 64)
    • Timing Channel Speed Compensation (Ch00 - CH07)

  • ON and Off-line timing channel programming, including:
    • Single Set-point programming
    • Pulse Train programming
    • Timing Channel Fine Tune

  • Channel set-points download to M4500
  • Channel set-points upload from M4500
  • Configuration and channel set-point print-out

Advanced PLS Features

The PLS is fully integrated with the PLC. Thus, the actual resolver position, current RPM, and all other PLS parameters can be accessed by the PLC section. The PLC can also execute the PLS programming commands that would normally be executed through SYSdev or the D4591 Display/Keypad. This allows a wide variety of advanced PLS applications to be implemented. Examples are:

  • Brake Wear Compensation: The brake wear compensation algorithm is used in conjunction with presses which incorporate a top dead center (TDC) or back dead center (BDC) stop. With these presses, a timing signal is used to de-clutch the press for TDC or BDC stops. However, as the brake wears, the press will no longer stop at TDC but will instead overshoot. The brake wear compensation algorithm automatically adjust the TDC timing such that the press always stops at the desired stopping position regardless of brake wear.


  • Brake Wear Alarm: In conjunction with the brake wear compensation, brake response determination and a brake wear alarm can be implemented in the PLC section. This determines the actual number of degrees the brake takes to stop the press (from de-clutch to stop). The brake wear alarm can be activated if the brake response exceeds a preset number of degrees.


  • Speed Windows: These signals can be activated at preset speed thresholds as desired or needed. Since the RPM is directly available to the PLC section, virtually an unlimited number of speed windows could be generated by the PLC section.


  • Automatic Zero: Since the offset of the PLS can be accessed by the PLC section, it can also be changed in response to any desired logic condition, even as a function of speed which would, in affect, implement a speed compensation for all the timing channels.